INTEL X520-DA1

Host Interface:

PCI Express X8 lanes

Support PCI Express Base Specification 2.0 (5GT/s)

Low-Profile Adapter

Low power

SFP+ cage

Performance Features:

IPV4 and IPV6 Supports for IP/ TCP and IP/UDP Receive Checksum offload

Fragmented UDP checksum offload for Packet Reassembly

CPU utilization- the 82599 supports reduction in CPU utilization, mainly by supporting Receive Side Coalescing (RSC)

Support for 16 virtual machine Device Queues ( VMDq) per port

Support Direct Cache Access (DCA)

Advanced memory architecture reduces latency by preceding TSO packets. A TSO packet may be interleaved with other packets going to the wire

Minimized device I/O intterupts using MSI and MSI-X

Offload of TCP / IP / UDP checksum calculation and TCP segmentation

Large on chip receive packet buffer (512 KB)

Large on chip transmit packet buffer (160KB)

Supports the VPD (Vital Product Data) capability defined in the PCI specification ver. 3.0

Time sync- IEEE1588- Precision Time Protocol (PTP)

Supports the BCN (Backward Congestion Notification) protocol in addition to the EEDC functionality

LAN Features:

IEEE 802.x flow control support

IEEE 802.1q VLAN tagging support

IEEE 802.1p layer 2 priority encoding

Jumbo Frame (up to 15.5KB)

Link Aggregation and Load Balancing

RFC2819 RMON MIB statistics

TCP Segmentation Offload Up to 256KB

Ipv6 Support for IP/TCP Receive Checksum Offload

LEDs indicator for link/Activity

Specifications

Chipset    intel JL82599EN

Slot Type  PCI-E X8

Interface SFP+ cage * 1

Transmission Rate   10000Mbps

Boot Rom         Yes

Management Features   IPMI pass-through via SMBus or NC-SI, iSCSI boot, WoL, PXE remote boot, VLAN filtering

Transmitted Power

Supports System      DOS , Windows , Linux , FREEBSD, NWSERVER